`ifndef {{NAME}}_MODEL__SV
`define {{NAME}}_MODEL__SV

class {{name}}_model extends uvm_component;

    uvm_blocking_get_port #({{name}}_transaction) port;
    uvm_analysis_port #({{name}}_transaction) ap;

    extern function new(string name, uvm_component parent);
    extern function void build_phase(uvm_phase phase);
    extern virtual task main_phase(uvm_phase phase);

    `uvm_component_utils({{name}}_model);

endclass

function {{name}}_model::new(string name, uvm_component parent);
    super.new(name, parent);
endfunction

function void {{name}}_model::build_phase(uvm_phase phase);
    super.build_phase(phase);
    port = new("port", this);
    ap = new("ap", this);
endfunction

task {{name}}_model::main_phase(uvm_phase phase);
    {{name}}_transaction tr;
    {{name}}_transaction new_tr;
    super.main_phase(phase);
    
    while (1) begin
        port.get(tr);
        new_tr = new("new_tr");
        new_tr.copy(tr);
        `uvm_info("{{name}}_model", "get one transaction, copy and print it:", UVM_LOW);
        new_tr.print();
        ap.write(new_tr);
    end
endtask

`endif